|Name||Dr. Syed Azhar Ali Zaidi|
|Department||Electronics Engineering (Taxila)|
|Specialization||ASIC Design, Digital Architectures for Communications|
University of Engineering and Technology Taxila, Pakistan, 2008
University of Engineering and Technology Taxila, Pakistan, 2011
Politecnico di Torino, Italy, 2015
 S.A.A.Zaidi, A. Tuoheti, M.Martina and G.Masera,"FPGA accelerator of Algebraic Quasi Cyclic LDPC Codes for NAND flash memories," in Design & Test, IEEE
 S.A.A.Zaidi, M.Awais, C.Condo, M.Martina and G.Masera,"FPGA accelerator of Quasi Cyclic EG-LDPC Codes decoder for NAND flash memories": In Design and Architectures for Signal and Image Processing(DASIP), 2013 Conference on, pages 190-195, 2013.
 S.A.A. Zaidi, M. Martina, and G. Masera., “Rapid Prototyping of Floating Point AWGN Channel Using High Level Synthesis”. In Forum on Specification and Design Languages (FDL), 2014 Conference on, paper 46, Oct 2014.
 A. Zahir, S.A.A. Zaidi, A. Pulimeno, M. Graziano, D. Demarchi, G. Masera and G. Piccinini., “Molecular transistor circuits: From device model to circuit simulation”. In Nanoscale Architectures (NANOARCH), 2014 IEEE/ACM International Symposium on, Paris, pp. 129-134, July 2014.
 G.Xiao, W.Ahmad, S.A.A. Zaidi, M. Ruo Roch, G. Causapruno.,“High Speed VLSI Architecture for Finding the First W Maximum/minimum Values”. In Applications in Electronics Pervading Industry, Environment & Society (APPLEPIES), 2014 Conference on, paper 5, May 2014.